![]() The TRD also demonstrates the value of offloading computation-intensive tasks onto PL, thereby freeing the CPU resources to be available for user-specific applications. The Base TRD demonstrates how the user can seamlessly switch between a software or a hardware implementation and evaluate the cost and benefit of each implementation. The SoC allows the user to implement a video processing algorithm that performs edge detection on an image (Sobel filter) either as a software program running on the Zynq-7000 SoC based PS or as a hardware accelerator inside the SoC based PL. The Base TRD consists of two elements: The Zynq-7000 SoC Processing System (PS) and a video processing pipeline implemented in Programmable Logic (PL). The Base TRD is an embedded video processing application designed to showcase various features and capabilities of the Zynq Z-7020 SoC device for the embedded domain. For additional information, refer to Zynq-7000 SoC: ZC702 Evaluation Kit and Video and Imaging Kit Getting Started Guide. The ZC702 Evaluation kit is based on a XC7Z020 CLG484-1 Zynq-7000 SoC device. ![]() This page provides instructions on how to build various components of the Zynq Base Targeted Reference Design (TRD) and how to setup the hardware platform and run the design on the ZC702 Evaluation Kit. ISE DS 14.1 Targeted Base Reference Design ISE DS 14.2 Targeted Base Reference Design ISE DS 14.3 Targeted Base Reference Design ISE DS 14.4 Targeted Base Reference Design
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